1. Technical Field
This disclosure relates to semiconductor devices and more particularly, to a method and system for optically measuring dielectric layer thickness over metals or other reflective materials.
2. Description of the Related Art
Semiconductor devices utilize damascene metalization to form various conductive paths. In semiconductor memory devices, interconnects are sometimes formed using a damascene or a dual damascene layer. Damascene layers are used to provide a reflective surface for measurement of dielectric layers deposited thereon.
Where damascene or dual damascene is applied to form a given layer, a maximum linewidth is restricted by design rules to values of about 1 to 5 microns. This is due to chemical mechanical polishing (CMP) which causes metal lines to dish.
Referring to FIG. 1, a conventional memory device is shown having metal lines 10 formed in trenches 12 of a dielectric layer 16. Another dielectric layer 14 is deposited over metal lines 10. It is important to be able to measure the thickness of dielectric layer 14. Measurement of thickness of layers in semiconductor devices is often performed using optical interference methods. As shown in FIG. 2, light (indicated by arrow "A") falls incident on a surface 20 of a layer 22. Part of the light is reflected and part is transmitted when surface 20 is reached. The transmitted part continues to propagate through layer 22 until an interface 24 is reached. Then part of the light is reflected and part transmitted. Since reflected portions "B" and "C" of the light from surface 20 and interface 24, respectively have the same wavelength and are parallel, an interference pattern can be obtained in which phase shifts and other physical properties can be measured. Once the appropriate properties have been obtained the thickness of layer 22 may be determined.
Referring to FIG. 3, as mentioned above linewidths (w) are restricted to around 1-5 microns. The reason for this is due to increased dishing during CMP. Dishing is indicated in FIG. 3 by a bowed top surface 30 of metal lines 32. The larger the line width the more pronounced the dishing as shown in FIGS. 3 and 4. FIG. 3 shows dishing for metal lines 32 having a small linewidth, and FIG. 4 shows dishing for metal lines 34 having a larger line width. In a worst case, the cross-section of metal lines 36 is decreased to the point where all metal is removed from center portions 38 of the damascene metal lines as shown in FIG. 4.
One difficulty associated with dishing is how to measure the thickness of a dielectric layer deposited on top of the damascene metal by optical means as described above. Optical interference measurements are performed over a large field, typically 50 to 100 microns in width for metals that can be reactively ion etched (i.e. non-damascene metals). Applying the same type of optical measurements is not possible for damascene or dual damascene metals due to the fact that the damascene metal is almost totally removed in 500 nm deep trenches of widths greater than 10 microns due to CMP.
For optical measurements, a metal line width of about 20 to 30 microns is required. Attempts to "break up" metal lines into smaller "stripes", for example, 5 microns in width, to make metal lines less subjected to dishing and increase the field width have not been successful. The smaller "stripes" disturb optical interference patterns thereby reducing the accuracy of the dielectric thickness measurement.
Therefore, a need exists for a method of measuring a dielectric layer thickness wherein the dielectric layer is on top of a damascene metal.